1. Field of the Invention
This invention relates to systems for transferring data onto a data bus and reading data from a data bus and, more particularly, to such information transfer systems which protect the data bus and prevent the transfer of erroneous information.
2. Description of the Prior Art
Typically, information being carried on a data bus is either read or updated by directly connecting an add/drop module to the data bus at one of many module receiving points. In these systems, data is received ("dropped") from the data bus by reading the particular information directly from the bus through a bus receiver or amplifier. In order to transmit data or add data to the bus, a tri-state bus driver is typically employed at each module receiving location
In operation, the tri-state bus drivers are disabled by being placed in a high impedance state during the time slots when no data is to be transmitted onto the data bus. In order to control the proper switching of the tri-state bus drivers, a driver enable/disable control circuit is required. Whenever data is to be transmitted onto the data bus, the tri-state bus drivers must be enabled at the precisely desired time slot in order to allow the data from the add/drop module to be properly transmitted onto the data bus.
In using such prior art systems, problems are typically encountered primarily due to the need for tri-state bus drivers. These problems include: timing problems resulting from the requirement that only one tri-state bus driver be enabled at any one time; a relatively high failure rate of tri-state bus drivers; and corruption of the data on the data bus often occurring due to the requisite connection and disconnection of add/drop modules to the data bus.
Before the add/drop module can add or transmit data onto the data bus, the particular tri-state bus driver must be enabled. This timing is critical, if the tri-state bus driver is to be capable of adding data to the data bus during a precisely timed time slot. In addition, care must be exercised to assure that only one tri-state bus driver is enabled at any one time, since allowing more than one tri-state bus driver to be enabled simultaneously can damage the tri-state bus drivers and can cause data errors.
In order to prevent more than one tri-state bus driver from being enabled at any one time, these prior art systems are operated with a sufficient timing margin between time slots, in order to assure that all tri-state bus drivers achieve the high impedance state before any other tri-state bus driver is enabled in order to allow data transmission onto the bus.
In addition to these drawbacks, these prior art systems also suffer from the inability of preventing corruption of data on the data bus caused by bus driver failure. When a tri-state bus driver fails, the failure mode is often a short circuit to a voltage supply rail which results in the corruption of data on the data bus. Furthermore, a failure in the tri-state bus driver enable circuit when an add/drop module is present can corrupt the data by allowing data from the add/drop module to be transmitted onto the data bus continuously.
A further problem inherent in these prior art systems is the inability of the add/drop module to be connected or disconnected to the data bus without guaranteeing that the data will not be corrupted. Often, transient conditions caused by connecting or disconnecting the additional load to the data bus will cause the signal level on the data bus to change. These changes in the signal level can be large enough to be interpreted as data, thereby resulting in data corruption. It is essential that the tri-state bus driver be disabled when the add/drop module is being connected to the bus.